{"product_id":"9783846546215","title":"Implementation of a Binary Floating Point Fused Multiply-Add Unit (2012. 104 S. 220 mm)","description":"\u003cp\u003e§16§The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.\u003c\/p\u003e","brand":"LAP LAMBERT ACADEMIC PUBLISHING","offers":[{"title":"Default Title","offer_id":48772513956075,"sku":"00000_00000_00000_00000","price":96.9,"currency_code":"SGD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0758\/4484\/5803\/files\/9783846546215-1.jpg?v=1781734520","url":"https:\/\/kinokuniya.com.sg\/ja\/products\/9783846546215","provider":"Books Kinokuniya Singapore","version":"1.0","type":"link"}