{"product_id":"9780792390589","title":"Hierarchical Modeling for VLSI Circuit Testing (The Springer International Series in Engineering and Computer Science 89) (1989. 176 S. 235 mm)","description":"\u003cp\u003eTo match this high-level circuit model, we introduce a high-level bus fault that, in effect, replaces a large number of SSL faults and allows them to be tested in parallel.\u003c\/p\u003e","brand":"SPRINGER, BERLIN","offers":[{"title":"Default Title","offer_id":48673931002091,"sku":"00000_00000_00000_00000","price":201.41,"currency_code":"SGD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0758\/4484\/5803\/files\/9780792390589-1.jpg?v=1781638026","url":"https:\/\/kinokuniya.com.sg\/zh\/products\/9780792390589","provider":"Books Kinokuniya Singapore","version":"1.0","type":"link"}