Energy-Efficient Smart Temperature Sensors in CMOS Technology (Analog Circuits and Signal Processing) (1st ed. 2018. 2017. xvi, 118 S. 48 SW-Abb., 50 Farbabb., 48 Farbtabell)

This book describes the design and implementation of energy-efficient smart (digital output) temperature sensors in CMOS technology. To accomplish this, a new readout topology, namely the zoom-ADC, is presented. It combines a coarse SAR-ADC with a fine Sigma-Delta (SD) ADC. The digital result obtained from the coarse ADC is used to set the reference levels of the SD-ADC, thereby zooming its full-scale range into a small region around the input signal. This technique considerably reduces the SD-ADC’s full-scale range, and notably relaxes the number of clock cycles needed for a given resolution, as well as the DC-gain and swing of the loop-filter. Both conversion time and power-efficiency can be improved, which results in a substantial improvement in energy-efficiency. Two BJT-based sensor prototypes based on 1st-order and 2nd-order zoom-ADCs are presented. They both achieve inaccuracies of less than ±0.2°C over the military temperature range (-55°C to 125°C). A prototype capable of sensing temperatures up to 200°C is also presented. As an alternative to BJTs, sensors based on dynamic threshold MOSTs (DTMOSTs) are also presented. It is shown that DTMOSTs are capable of achieving low inaccuracy (±0.4°C over the military temperature range) as well as sub-1V operation, making them well suited for use in modern CMOS processes.